Debug for fit_fastio_pin_reassign program (iteration 1): I/O delay matrix:- Comb Reg SU Pin Cout Casc Clk N/A 44 N/A 44 N/A N/A Clr N/A 54 N/A 54 N/A N/A Pre N/A 54 N/A 54 N/A N/A Ena N/A N/A 32 N/A N/A N/A Ald N/A 54 N/A 54 N/A N/A OE N/A N/A N/A 61 N/A N/A Cin N/A N/A N/A N/A N/A N/A Casc N/A N/A N/A N/A N/A N/A Pin 35 N/A 135 N/A N/A N/A A N/A N/A 25 35 N/A N/A B N/A N/A N/A N/A N/A N/A C N/A N/A N/A N/A N/A N/A D N/A N/A N/A N/A N/A N/A Global clock delay matrix:- Comb Reg SU Pin Cout Casc Clk : N/A 26 52 N/A 38 N/A Clr : N/A 27 N/A N/A 39 N/A Pre : N/A 27 N/A N/A 39 N/A Ena : N/A N/A 22 N/A N/A N/A Ald : N/A 27 N/A N/A 39 N/A OE : N/A N/A N/A N/A N/A N/A Cin : 13 N/A 17 N/A 3 15 Casc: 7 N/A 11 N/A N/A 9 Pin : N/A N/A N/A N/A N/A N/A A : 23 N/A 27 N/A 12 25 B : 23 N/A 27 N/A 12 25 C : 23 N/A 27 N/A N/A 25 D : 18 N/A 22 N/A N/A 20 I/O delay matrix:- Comb Reg SU Pin Cout Casc Clk N/A 44 N/A 44 N/A N/A Clr N/A 54 N/A 54 N/A N/A Pre N/A 54 N/A 54 N/A N/A Ena N/A N/A 32 N/A N/A N/A Ald N/A 54 N/A 54 N/A N/A OE N/A N/A N/A 61 N/A N/A Cin N/A N/A N/A N/A N/A N/A Casc N/A N/A N/A N/A N/A N/A Pin 35 N/A 135 N/A N/A N/A A N/A N/A 25 35 N/A N/A B N/A N/A N/A N/A N/A N/A C N/A N/A N/A N/A N/A N/A D N/A N/A N/A N/A N/A N/A Global clock delay matrix:- Comb Reg SU Pin Cout Casc Clk : N/A 26 52 N/A 38 N/A Clr : N/A 27 N/A N/A 39 N/A Pre : N/A 27 N/A N/A 39 N/A Ena : N/A N/A 22 N/A N/A N/A Ald : N/A 27 N/A N/A 39 N/A OE : N/A N/A N/A N/A N/A N/A Cin : 13 N/A 17 N/A 3 15 Casc: 7 N/A 11 N/A N/A 9 Pin : N/A N/A N/A N/A N/A N/A A : 23 N/A 27 N/A 12 25 B : 23 N/A 27 N/A 12 25 C : 23 N/A 27 N/A N/A 25 D : 18 N/A 22 N/A N/A 20 Threshold are: for Tsu - 10.600000ns and for Tco - 17.700000ns Global Tsu=-1(-1.000000), Tco=-1(-1.000000) Input/output cells: a0 -> 41 : IN a1 -> 39 : IN a2 -> 38 : IN a3 -> 37 : IN b0 -> 49 : IN b1 -> 48 : IN b2 -> 47 : IN b3 -> 46 : IN parity -> 130 : OUT res0 -> 99 : OUT res1 -> 100 : OUT res2 -> 101 : OUT res3 -> 102 : OUT res4 -> 117 : OUT res5 -> 118 : OUT res6 -> 119 : OUT res7 -> 120 : OUT sel0 -> 78 : IN sel1 -> 79 : IN Set clique dont_touch: Cell: |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry1, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry2, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry3, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:61, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:70, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: a0, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: a1, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: a2, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: a3, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: b0, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: b1, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: b2, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: b3, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:84, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:85, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~86~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:86, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:92, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:165, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:166, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~2, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:167, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:68, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:77, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~78~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:78, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:79, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:84, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:143, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:149, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~2, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:150, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|pcarry4, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|pcarry5, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|lpm_add_sub:cpa_adder|addcore:adder|:127, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node0_2, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node1_1, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:94|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|:46, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|~51~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:41, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:45, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|~51~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:41, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:45, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|~51~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:166|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:184|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:202|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:220|result_node, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |mux2:31|lpm_mux:lpm_mux_component|muxlut:220|result_node~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: parity, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res0, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res1, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res2, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res3, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res4, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res5, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res6, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: res7, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: sel0, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: sel1, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: |xor_8:49|lpm_xor:lpm_xor_component|xor_cascade0_7~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |xor_8:49|lpm_xor:lpm_xor_component|xor_cascade0_7~2, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |xor_8:49|lpm_xor:lpm_xor_component|xor_cascade0_7, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Virtual pin individual set-up and clock-to-output times: For pin a0 delays are: tsu=-1, tco=-1; For pin a1 delays are: tsu=-1, tco=-1; For pin a2 delays are: tsu=-1, tco=-1; For pin a3 delays are: tsu=-1, tco=-1; For pin b0 delays are: tsu=-1, tco=-1; For pin b1 delays are: tsu=-1, tco=-1; For pin b2 delays are: tsu=-1, tco=-1; For pin b3 delays are: tsu=-1, tco=-1; For pin parity delays are: tsu=-1, tco=-1; For pin res0 delays are: tsu=-1, tco=-1; For pin res1 delays are: tsu=-1, tco=-1; For pin res2 delays are: tsu=-1, tco=-1; For pin res3 delays are: tsu=-1, tco=-1; For pin res4 delays are: tsu=-1, tco=-1; For pin res5 delays are: tsu=-1, tco=-1; For pin res6 delays are: tsu=-1, tco=-1; For pin res7 delays are: tsu=-1, tco=-1; For pin sel0 delays are: tsu=-1, tco=-1; For pin sel1 delays are: tsu=-1, tco=-1; Cells driven by pins |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry1 is driven by a0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:70 is driven by a0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:84 is driven by a0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:165 is driven by a0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:68 is driven by a0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:77 is driven by a0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:84 is driven by a0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:149 is driven by a0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:94|result_node is driven by a0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry1 is driven by a1 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:70 is driven by a1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:85 is driven by a1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:166 is driven by a1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:68 is driven by a1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~78~1 is driven by a1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:84 is driven by a1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:150 is driven by a1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node1_1 is driven by a1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|~51~1 is driven by a1 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry2 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~86~1 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:86 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~1 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:78 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:79 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:143 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~1 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~2 is driven by a2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node0_2 is driven by a2 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:45 is driven by a2 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|~51~1 is driven by a2 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry3 is driven by a3 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:61 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~86~1 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~2 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:167 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~78~1 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:79 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:143 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~1 is driven by a3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~2 is driven by a3 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:45 is driven by a3 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|~51~1 is driven by a3 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry1 is driven by b0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:70 is driven by b0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:68 is driven by b0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~78~1 is driven by b0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:84 is driven by b0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~1 is driven by b0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~2 is driven by b0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node0_2 is driven by b0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:94|result_node is driven by b0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry1 is driven by b1 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:70 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~86~1 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~1 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:68 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:78 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:79 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:84 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:143 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~1 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~2 is driven by b1 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node1_1 is driven by b1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|~51~1 is driven by b1 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry2 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~86~1 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~2 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:167 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:77 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~78~1 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:79 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:143 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:149 is driven by b2 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:150 is driven by b2 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:45 is driven by b2 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|~51~1 is driven by b2 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry3 is driven by b3 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:61 is driven by b3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:84 is driven by b3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:85 is driven by b3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:86 is driven by b3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:165 is driven by b3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:166 is driven by b3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~1 is driven by b3 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~2 is driven by b3 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:45 is driven by b3 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|~51~1 is driven by b3 |mux2:31|lpm_mux:lpm_mux_component|muxlut:94|result_node is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|:46 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|~51~1 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:41 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:45 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|~51~1 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:41 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:45 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|~51~1 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:166|result_node is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:220|result_node~1 is driven by sel0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:94|result_node is driven by sel1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|result_node is driven by sel1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|:46 is driven by sel1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|result_node is driven by sel1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|result_node is driven by sel1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:166|result_node is driven by sel1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:220|result_node~1 is driven by sel1 Cells driving pins |xor_8:49|lpm_xor:lpm_xor_component|xor_cascade0_7 drives parity |mux2:31|lpm_mux:lpm_mux_component|muxlut:94|result_node drives res0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|result_node drives res1 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|result_node drives res2 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|result_node drives res3 |mux2:31|lpm_mux:lpm_mux_component|muxlut:166|result_node drives res4 |mux2:31|lpm_mux:lpm_mux_component|muxlut:184|result_node drives res5 |mux2:31|lpm_mux:lpm_mux_component|muxlut:202|result_node drives res6 |mux2:31|lpm_mux:lpm_mux_component|muxlut:220|result_node drives res7 FAST I/O assignement after cleaning up: a0: fast_io=0 a1: fast_io=0 a2: fast_io=0 a3: fast_io=0 b0: fast_io=0 b1: fast_io=0 b2: fast_io=0 b3: fast_io=0 parity: fast_io=0 res0: fast_io=0 res1: fast_io=0 res2: fast_io=0 res3: fast_io=0 res4: fast_io=0 res5: fast_io=0 res6: fast_io=0 res7: fast_io=0 sel0: fast_io=0 sel1: fast_io=0 Layer-by-layer logic: fast_io=0 Layer 0 a0, RDF bits: 5, lab#=0 a1, RDF bits: 5, lab#=0 a2, RDF bits: 5, lab#=0 a3, RDF bits: 5, lab#=0 b0, RDF bits: 5, lab#=0 b1, RDF bits: 5, lab#=0 b2, RDF bits: 5, lab#=0 b3, RDF bits: 5, lab#=0 parity, RDF bits: 3, lab#=0 res0, RDF bits: 3, lab#=0 res1, RDF bits: 3, lab#=0 res2, RDF bits: 3, lab#=0 res3, RDF bits: 3, lab#=0 res4, RDF bits: 3, lab#=0 res5, RDF bits: 3, lab#=0 res6, RDF bits: 3, lab#=0 res7, RDF bits: 3, lab#=0 sel0, RDF bits: 5, lab#=0 sel1, RDF bits: 5, lab#=0 Layer 1 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry1, RDF bits: 50, lab#=0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry2, RDF bits: 50, lab#=0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|pcarry3, RDF bits: 50, lab#=0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:61, RDF bits: 50, lab#=0 |add4:2|lpm_add_sub:lpm_add_sub_component|addcore:adder|:70, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:84, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:85, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~86~1, RDF bits: 1050, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:86, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:165, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:166, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~1, RDF bits: 1050, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|~167~2, RDF bits: 1050, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_add:sub_csa_add|csa_cell:adder0|:167, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:68, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:77, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~78~1, RDF bits: 1050, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:78, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:79, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:84, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:143, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:149, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~1, RDF bits: 1050, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|~150~2, RDF bits: 1050, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|csa_add:padder|csa_cell:adder0|:150, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node0_2, RDF bits: 50, lab#=0 |mult:1|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node1_1, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:94|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|:46, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:112|~51~1, RDF bits: 1050, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:41, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|:45, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:130|~51~1, RDF bits: 1050, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:41, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|:45, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:148|~51~1, RDF bits: 1050, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:166|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:184|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:202|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:220|result_node, RDF bits: 50, lab#=0 |mux2:31|lpm_mux:lpm_mux_component|muxlut:220|result_node~1, RDF bits: 1050, lab#=0 |xor_8:49|lpm_xor:lpm_xor_component|xor_cascade0_7, RDF bits: 50, lab#=0 Physical pins available: row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: -1, col: 1 RDF: 800003c7 row: -1, col: 3 RDF: 800003c7 row: -1, col: 4 RDF: 800003c7 row: -1, col: 5 RDF: 800003c7 row: -1, col: 6 RDF: 800003c7 row: -1, col: 7 RDF: 800003c7 row: -1, col: 8 RDF: 800003c7 row: -1, col: 9 RDF: 800003c7 row: -1, col: 10 RDF: 800003c7 row: -1, col: 10 RDF: 800003c7 row: -1, col: 11 RDF: 800003c7 row: -1, col: 11 RDF: 800003c7 row: -1, col: -1 RDF: 4600080d row: -1, col: -1 RDF: d row: -1, col: -1 RDF: 4600080d row: -1, col: 12 RDF: 800003c7 row: -1, col: 13 RDF: 800003c7 row: -1, col: 14 RDF: 800003c7 row: -1, col: 15 RDF: 800003c7 row: -1, col: 16 RDF: 800003c7 row: -1, col: 17 RDF: 800003c7 row: -1, col: 17 RDF: 800003c7 row: -1, col: 18 RDF: 800003c7 row: -1, col: 19 RDF: 800003c7 row: -1, col: 20 RDF: 800003c7 row: -1, col: 21 RDF: 800003c7 row: -1, col: 22 RDF: 800003c7 row: -1, col: 23 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 2, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 row: 1, col: -1 RDF: 800003c7 95. 14 (INIT_DONE) row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 98. 11 (RDYnBUSY) row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 row: 0, col: -1 RDF: 800003c7 102. 7 (CLKUSR) row: 0, col: -1 RDF: 800003c7 109. 144 (nCS) row: -1, col: 23 RDF: 800003c7 110. 143 (CS) row: -1, col: 23 RDF: 800003c7 111. 142 (nWS) row: -1, col: 22 RDF: 800003c7 112. 141 (nRS) row: -1, col: 21 RDF: 800003c7 row: -1, col: 20 RDF: 800003c7 row: -1, col: 19 RDF: 800003c7 row: -1, col: 18 RDF: 800003c7 row: -1, col: 18 RDF: 800003c7 row: -1, col: 17 RDF: 800003c7 row: -1, col: 16 RDF: 800003c7 row: -1, col: 15 RDF: 800003c7 row: -1, col: 14 RDF: 800003c7 row: -1, col: 13 RDF: 800003c7 125. 128 (DEV_OE) row: -1, col: 12 RDF: 800003c7 row: -1, col: -1 RDF: 4600080d row: -1, col: -1 RDF: d row: -1, col: -1 RDF: 4600080d 131. 122 (DEV_CLRn) row: -1, col: 11 RDF: 800003c7 row: -1, col: 9 RDF: 800003c7 row: -1, col: 8 RDF: 800003c7 row: -1, col: 7 RDF: 800003c7 row: -1, col: 6 RDF: 800003c7 row: -1, col: 5 RDF: 800003c7 137. 116 (DATA7) row: -1, col: 4 RDF: 800003c7 139. 114 (DATA6) row: -1, col: 3 RDF: 800003c7 140. 113 (DATA5) row: -1, col: 2 RDF: 800003c7 141. 112 (DATA4) row: -1, col: 2 RDF: 800003c7 142. 111 (DATA3) row: -1, col: 1 RDF: 800003c7 143. 110 (DATA2) row: -1, col: 0 RDF: 800003c7 144. 109 (DATA1) row: -1, col: 0 RDF: 800003c7 Sorted pins: Pin sel0: Link strength=912, fast_io=0, group No.=0 Pin sel1: Link strength=816, fast_io=0, group No.=0 Pin b2: Link strength=728, fast_io=0, group No.=0 Pin b3: Link strength=704, fast_io=0, group No.=0 Pin a3: Link strength=688, fast_io=0, group No.=0 Pin b0: Link strength=688, fast_io=0, group No.=0 Pin b1: Link strength=688, fast_io=0, group No.=0 Pin a1: Link strength=680, fast_io=0, group No.=0 Pin a0: Link strength=664, fast_io=0, group No.=0 Pin a2: Link strength=648, fast_io=0, group No.=0 Pin res0: Link strength=448, fast_io=0, group No.=0 Pin res4: Link strength=392, fast_io=0, group No.=0 Pin res3: Link strength=344, fast_io=0, group No.=0 Pin res2: Link strength=336, fast_io=0, group No.=0 Pin res5: Link strength=336, fast_io=0, group No.=0 Pin res6: Link strength=328, fast_io=0, group No.=0 Pin res7: Link strength=328, fast_io=0, group No.=0 Pin res1: Link strength=320, fast_io=0, group No.=0 Pin parity: Link strength=280, fast_io=0, group No.=0 Output pin initial assignments: All the rest pin assignments: Layer-by-layer logic: fast_io=1 Layer 0 a0, RDF bits: 5, lab#=0 a1, RDF bits: 5, lab#=0 a2, RDF bits: 5, lab#=0 a3, RDF bits: 5, lab#=0 b0, RDF bits: 5, lab#=0 b1, RDF bits: 5, lab#=0 b2, RDF bits: 5, lab#=0 b3, RDF bits: 5, lab#=0 parity, RDF bits: 3, lab#=0 res0, RDF bits: 3, lab#=0 res1, RDF bits: 3, lab#=0 res2, RDF bits: 3, lab#=0 res3, RDF bits: 3, lab#=0 res4, RDF bits: 3, lab#=0 res5, RDF bits: 3, lab#=0 res6, RDF bits: 3, lab#=0 res7, RDF bits: 3, lab#=0 sel0, RDF bits: 5, lab#=0 sel1, RDF bits: 5, lab#=0 Layer 1 Logic level 1 allocation.